Challenges and opportunities at the confluence of semiconductor manufacturing (SM) and applied math (AM): The SM-AM Agora
Recording of April 12th Agora
Slides:
Date: Friday, April 12, 2024, 3:30pm
Speaker: Krishna Muralidharan, Materials Science & Engineering, University of Arizona
Title: Challenges and opportunities at the confluence of semiconductor manufacturing (SM) and applied math (AM): The SM-AM Agora
Place: Math, 501 and Zoom: https://arizona.zoom.us/j/83738249833 Passcode: applied
Abstract: As citizens of the 21st century, we would be hard-pressed to identify any ‘modern’ gadget or appliance or vehicle or medical equipment that are not driven by silicon-based semiconductor chips. The average semiconductor chip consists of interconnected integrated circuits (IC) connecting billions of electronic components including transistors, diodes, resistors, capacitors and more. Manufacturing semiconductor chips at scale is a complex multi-step process that can be broadly classified in terms of processing, packaging and testing. While there has been steady progress in increasing the number of transistors on a chip by reducing critical transistor dimensions, we will soon reach a scaling limit, beyond which further feature reduction may not be possible (Moore’s law). Thus, moving beyond the scaling limits of Moore’s law represents an important manufacturing challenge, which will entail developing new materials (beyond silicon), new device and IC architectures, new packaging approaches, as well as exploring new computing paradigms (quantum, neuromorphic, stochastic computing). Further, in this regard, there is significant thrust towards new co-design paradigms, where a common design environment is used for concurrently modeling and optimizing the choice, selection and design of hardware-materials, devices, circuits, architectures, and software as required for the application(s). Finally, new directions have also been put forth for developing ASIC (application specific integrated circuit) also known as task-specific or functionality-specific IC, where several different circuits are used in conjunction on one chip; versatile and cost-effective ASIC impact myriad technological applications spanning computing, artificial intelligence (AI), communication, sensing, transport, defense and so on. Keeping in mind the above-identified challenges that underlie the future of semiconductor manufacturing, new integrative strategies are required for achieving solutions in an accelerated manner. Multi-theory, multiscale models and methods along with AI-driven generative design thus become necessary to provide important guiding principles for design, development and manufacture of future-proof semiconductor devices and systems. Towards this end, the SM-AM Agora will provide a platform for discussing current and future challenges and opportunities that underlie semiconductor manufacturing, and how the field of applied math and AI can enable transformative changes in this regard. Specifically, the discussion at this Agora will include topics such as: (i) development of digital twins of the manufacturing pipeline, (ii) materials informatics for discovering and designing new low-dimensional materials, (iii) new computing paradigms (quantum, neuromorphic, stochastic), (iv) AI for chip design and custom-chips for AI, (v) semiconductor manufacturing and national security, and (vi) energy-efficient manufacturing and manufacturing of energy-efficient chips (e.g. for blockchains), (vii) co-design approaches, (viii) ASIC architectures.